CA32F065N5

ARM 32-bit CPU (64 MHz MAX) 64K ROM Flash |Touch Key|12Bit ADC |16Bit PWM |store data when power is off|Package QFN32

  • Scheme details
  • CA32F065N5


    The CA32F065N5 adopts the high - performance ARM Cortex® - M0 core, with a maximum operating frequency of 64 MHz. It is equipped with high - speed embedded flash memory (up to 64K bytes of FLASH, up to 8K bytes of SRAM, and 2K bytes of Cache), and widely integrates enhanced peripherals and I/O ports. It provides a variety of standard communication interfaces (one I2C, one CAN2.0, three serial ports, and two SPIs), two 12 - bit ADCs, one timer with 7 - channel PWM, two general - purpose timers, and two basic timers. The CA32F065L0 series operates in a temperature range of - 40 to + 85 °C and a power supply voltage range of 2.0V to 5.5V, and has a set of power - saving modes designed for low - power consumption applications.

    Product Details


    CPU Core

    ARM 32 - bit CPU (up to 64 MHz)

    Memory

    · Built - in 64K bytes of Flash memory

    · Built - in 8K bytes of SRAM

    · Built - in 2K bytes of Cache

    · Built - in CRC calculation unit

    Reset and Power Supply Management

    · Power Supply Voltage Range: 2.0 - 5.5V

    · Built - in power - on/power - down reset (POR/PDR)

    · Built - in programmable voltage detector (LVD)

    Clock Section

    · Supports an external 4 - 24 MHz oscillator

    · Supports an external 32.768 KHz RTC oscillator

    · Built - in 16 MHz RC oscillator

    · Built - in high - speed PLL

    · Built - in 96 KHz RC oscillator

    · Supports 1 - channel clock output, which can be configured as system clock, HSE, HSI, LSE, LSI, or a 2 - divided PLL output

    GPIO

    · Supports 27 high - speed GPIO pins

    · All can be mapped as external interrupt inputs

    DMA

    · Supports a 5 - channel DMA controller

    Timers

    · One 16 - bit 7 - channel timer for 7 - channel PWM output, with a dead - time generator and emergency braking function

    · Two 16 - bit general - purpose timers, each with up to 4 input capture or output compare channels, and a dead - time generator

    · Two 16 - bit basic timers

    · Independent and window watchdog timers

    · SysTick timer

    RTC

    · Supports RTC real - time clock, alarm events, periodic wake - up, and can implement year - month - day functions

    ADC

    · 12 - bit ADC (12 sampling channels)

    · Built - in one high - speed ADC_1 supporting a 1 Mbps sampling rate

    · Built - in one ADC_0 with a 100 Kbps sampling rate

    · Three reference voltages: external reference VREF, VCC, and internal reference 1.5V

    Analog Components

    · Four independent analog comparators with programmable inputs

    · Two independent operational amplifiers (AMP)

    · Two independent programmable gain amplifiers (PGA)

    · The arithmetic unit supports hardware division (HDIV) and square root (SQRT)

    Touch Sensors

    · Built - in capacitive touch - key sensors

    · Supports up to 18 - channel capacitive touch keys

    · Meets the EMI (CS) test standard

    Peripheral Communication Interfaces

    · One I2C interface, supporting master - slave mode

    · Three UART interfaces, supporting full - duplex mode

    · Two SPI interfaces, supporting master - slave mode and DMA channels

    · One CAN2.0 interface

    Other Features

    · Supports serial two - wire download, simulation, and debugging (SWD) functions

    · Supports a 128 - bit identity ID

    Package Form

    QFN32 (4x4mm)



    CA32F065N5


    The CA32F065N5 adopts the high - performance ARM Cortex® - M0 core, with a maximum operating frequency of 64 MHz. It is equipped with high - speed embedded flash memory (up to 64K bytes of FLASH, up to 8K bytes of SRAM, and 2K bytes of Cache), and widely integrates enhanced peripherals and I/O ports. It provides a variety of standard communication interfaces (one I2C, one CAN2.0, three serial ports, and two SPIs), two 12 - bit ADCs, one timer with 7 - channel PWM, two general - purpose timers, and two basic timers. The CA32F065L0 series operates in a temperature range of - 40 to + 85 °C and a power supply voltage range of 2.0V to 5.5V, and has a set of power - saving modes designed for low - power consumption applications.

    Product Details


    CPU Core

    ARM 32 - bit CPU (up to 64 MHz)

    Memory

    · Built - in 64K bytes of Flash memory

    · Built - in 8K bytes of SRAM

    · Built - in 2K bytes of Cache

    · Built - in CRC calculation unit

    Reset and Power Supply Management

    · Power Supply Voltage Range: 2.0 - 5.5V

    · Built - in power - on/power - down reset (POR/PDR)

    · Built - in programmable voltage detector (LVD)

    Clock Section

    · Supports an external 4 - 24 MHz oscillator

    · Supports an external 32.768 KHz RTC oscillator

    · Built - in 16 MHz RC oscillator

    · Built - in high - speed PLL

    · Built - in 96 KHz RC oscillator

    · Supports 1 - channel clock output, which can be configured as system clock, HSE, HSI, LSE, LSI, or a 2 - divided PLL output

    GPIO

    · Supports 27 high - speed GPIO pins

    · All can be mapped as external interrupt inputs

    DMA

    · Supports a 5 - channel DMA controller

    Timers

    · One 16 - bit 7 - channel timer for 7 - channel PWM output, with a dead - time generator and emergency braking function

    · Two 16 - bit general - purpose timers, each with up to 4 input capture or output compare channels, and a dead - time generator

    · Two 16 - bit basic timers

    · Independent and window watchdog timers

    · SysTick timer

    RTC

    · Supports RTC real - time clock, alarm events, periodic wake - up, and can implement year - month - day functions

    ADC

    · 12 - bit ADC (12 sampling channels)

    · Built - in one high - speed ADC_1 supporting a 1 Mbps sampling rate

    · Built - in one ADC_0 with a 100 Kbps sampling rate

    · Three reference voltages: external reference VREF, VCC, and internal reference 1.5V

    Analog Components

    · Four independent analog comparators with programmable inputs

    · Two independent operational amplifiers (AMP)

    · Two independent programmable gain amplifiers (PGA)

    · The arithmetic unit supports hardware division (HDIV) and square root (SQRT)

    Touch Sensors

    · Built - in capacitive touch - key sensors

    · Supports up to 18 - channel capacitive touch keys

    · Meets the EMI (CS) test standard

    Peripheral Communication Interfaces

    · One I2C interface, supporting master - slave mode

    · Three UART interfaces, supporting full - duplex mode

    · Two SPI interfaces, supporting master - slave mode and DMA channels

    · One CAN2.0 interface

    Other Features

    · Supports serial two - wire download, simulation, and debugging (SWD) functions

    · Supports a 128 - bit identity ID

    Package Form

    QFN32 (4x4mm)



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